About COMPASS
The 2023 COMPASS Theme is Megatrends in Test and Measurement
FormFactor’s COMPASS test and measurement community event brings together FormFactor customers from around the
world to discuss the products and technologies shaping our future. Industry leaders and speakers from corporations,
leading-edge research institutions and FormFactor share test insights on a wide variety of emerging applications
including 5G, trends in advanced packages, next generation memories and other devices, ultra-low noise testing,
cryogenic probing and millimeter-wave measurement and calibration.
Two Ways to Participate in COMPASS 2023!
Virtual - Enjoy COMPASS wherever you are.
A link will be provided for you to join from your device.
Watch Party - Join us at one of our watch party locations throughout the world.
Hear COMPASS presentations and network with attendees and technical staff.
All COMPASS events are no charge
Agenda
Welcome & Reception
Mike Slessor, President & CEO - FormFactor Inc.
代表取締役 川又 信尋
Nobuhiro Kawamata, , FormFactor Inc.
Kainoa Kekahuna, Applications Engineering Manager, FormFactor Inc.
Lunch Break
Quantum control chips are required to be operated at cryogenic temperature to realize large-scale quantum computers. This presentation will introduce a design example of cryogenic analog circuit for controlling silicon spin qubits and its measurement results at 4 K temperature. The presentation will also provide cryogenic evaluation results of a multi-chip packaging structure for qubit installation at 100 mK temperature.
神戸大学
大学院 科学技術イノベーション研究科
准教授 博士(工学)
三木 拓司 様
多数の量子ビットを集積した大規模量子コンピュータを実現するためには、量子ビット制御回路の極低温動作が不可欠です。本プレゼンテーションでは、シリコンスピン量子ビットを制御するための極低温アナログ回路の設計事例と4Kでの測定結果を紹介します。また、量子ビットチップを積層するマルチチップ構造の100mKにおける極低温耐性評価についてもご紹介します。
Cryogenic Measurements of Quantum Control Chips for Large-scale Silicon Quantum Computers
Takuji Miki - Associate Professor, Graduate School of Science, Technology and Innovation Department of Science, Technology and Innovation - Kobe University
Quantum control chips are required to be operated at cryogenic temperature to realize large-scale quantum computers. This presentation will introduce a design example of cryogenic analog circuit for controlling silicon spin qubits and its measurement results at 4 K temperature. The presentation will also provide cryogenic evaluation results of a multi-chip packaging structure for qubit installation at 100 mK temperature.
COFFEE BREAK & EXHIBITION
東京工業大学
科学技術創生研究院 未来産業技術研究所
特任教授 博士（工学）
栗田 洋一郎 様
随時更新予定
Latest Trends in Chiplet Integration Technology
Kurita Yoichiro - Specially Appointed Professor, Laboratory for Future Interdisciplinary Reserch of Science and Technology (FIRST), Institute of Innovative Reserach - Tokyo Institute of Technology
Abstract Not Available
フォームファクター株式会社
シニアディレクター
佐伯 多加夫
半導体業界がポスト・ムーアの法則の時代に進む中、アドバンスト・パッケージングは、コストの削減と同時にパフォーマンス、コンピューティング能力、周波数帯域幅の向上を必要とする次世代デバイスを実現するテクノロジーとして注目されています。 2.5D および 3D IC パッケージング技術は、ますます多くのアプリケーションに利用されています。 こうした性能要件の高まりにより、実行可能なコストでデバイスの性能と歩留まりを確保するために、新たなテストの課題が増え続けています。 これらの要件をサポートするために、テスト戦略とソリューションは進化しています。 本プレゼンテーションでは、先進的なパッケージング オプション、特に 2D および 3D IC テクノロジーの現在の傾向を、プローブ カードの観点からのテスト要件と、現在および次世代のデバイス テストに適合するプローブ カード ソリューションとともにレビューします。
Emerging Trends, Challenges and Solutions for Probing Next Generation Advanced Packaging Devices
Saeki Takao - Sr Director, Manufacturing Engineering - FormFactor Inc.
As the semiconductor industry continues into the post Moore’s Law era, Advanced Packaging continues to emerge as an enabling technology for next generation devices that require increased performance, computing power and bandwidth all while driving lower costs. 2.5D and 3D IC packaging technology is being utilized for ever increasing applications. These increased performance requirements are driving new and ever-increasing test challenges in order to insure device performance and yield with commercially viable costs. Test strategies and solutions are evolving in order to support these requirements. This presentation will review the current trends in advance packaging options, particularly 2D and 3D IC technology along with the test requirements from a probe card perspective and probe card solutions to meet the current and next generation device testing.
COFFEE BREAK & EXHIBITION
日本テキサスインスツルメンツ合同会社
美浦工場
安藤 剛樹 様
Parametric Test - Outline for Parametric Test-
Takeki Andoh - Parametric Test Engineer, Texas Instruments Japan Limited
Provides an overview of parametric testing. Parametric testing consists of all the elements and wiring of an integrated circuit as a single unit.
It is a process to determine whether each element is completed according to the design by measuring the characteristics of each element. Because test elements are formed through a variety of processes, Also this is a very important test process that supports manufacturing equipment quality in each process.
In this presentation, we will deepen our understanding of what parametric testing should be like.
Jerry Broz, Sr. VP of Business Development & Strategic Marketing, Delphon Industries, LLC.
すべての電気テストは、高度なプローブ カードを使用してデバイス上で物理的な「タッチダウン」によって実行されます。
ウェハテストレベルでの要求に対し、テストセルツール/革新的なプローブカード/新材料の開発が必須です。
テストの複雑さが増す中で、高度なプローブ洗浄戦略は、歩留まりを最大化するための基礎となります。
本プレゼンテーションでは、プローブ カードのクリーニングの プロセスとそのイノベーション、コラボレーション、パートナーシップ、および学際的な問題解決アプローチを必要とするさまざまな技術的 (および商業的) 課題に焦点を当てます。
Address Data Integrity Challenges During Expanded Wafer Test
Event closure
End of event reception
Agenda is subject to change
- Applies to on-site "watch party" participants
Mike Slessor
President & CEO
Brandon Boiko
Sr. Applications Engineer
David Cooke
Product Marketing Manager
Pratik Ghate
Principal RF Engineer
Jack De Grave
Director, Business Development
Hadi Najar
Sr Principal Engineer Mechanical Design
Simon Reissmann
Sr. Applications Engineer
Pranav Shrivastava
Principal Applications Engineer
Dr. Choon Beng Sia
Test Technologist
Mike Slessor
President & CEO, FormFactor, Inc.
Michael D. Slessor has served as our Chief Executive Officer of FormFactor, Inc. since December 2014, and as a Director since October 2013. Mike served as President from October 2013 to December 27, 2014, and as Senior Vice President and General Manager, MicroProbe Product Group from October 2012 to October 2013. Before joining FormFactor, he was President and Chief Executive Officer of MicroProbe from July 2008 through the October 2012 closing of FormFactor’s acquisition of MicroProbe. Prior to joining MicroProbe, he held various management, product-marketing, and applications-engineering positions in the semiconductor industry, primarily with KLA.
Mike received his Ph.D. in Aeronautics and Physics from the California Institute of Technology and his B.A.Sc. in Engineering Physics from the University of British Columbia.
Brandon Boiko
Sr. Applications Engineer, FormFactor, Inc.
Brandon is a senior applications engineer with FormFactor Inc. as part of the cryogenics HPD product group. He attended the University of Colorado in Boulder where he earned both his bachelor’s and master’s degree in mechanical engineering. Starting his cryogenics career in 2015 at High Precision Devices, Brandon has more than 8 years of experience designing low temperature equipment. In Fall of 2021 FormFactor initiated the Advanced Cryogenics Lab where he is currently leading the development of cryogenic test as a service.
Dr. Choon Beng Sia
Test Technologist, FormFactor, Inc.
Dr Choon Beng Sia is a SSG Fellow, conferred by the President of the Republic of Singapore. He is also a Nanyang Research Scholar and has received doctorate degree in Electronics Engineering from Nanyang Technological University, Singapore. At MIT, Dr Sia studied data science and big data analytics.
In his current work at FormFactor as a Test Technologist in the Center of Expertise, Dr Sia develops and commercializes solutions to overcome emerging semiconductor wafer test and measurement challenges. His research interests include design, test and modelling of silicon-based RF devices, THz calibration and measurements for beyond 5G and IoT applications, photonics and power device wafer tests for LIDAR/Autonomous Transport/Optical communication applications as well as applying data analytics, deep learning and artificial intelligence to wafer tests and device modelling.
Dr Sia also serves in the IEEE MTT-3 technical committee that develops standards and best practices for RF measurements and he is also the MTT-3 speaker bureau specialising in wafer RF and 5G tests. Through SPRING, the Singapore National Standards board, Dr Sia represents Singapore as a Technical Expert in various IEC technical committees, developing standards for MEMs, optical and wafer-level reliability tests for semiconductor devices.
Dr Sia is a frequent invited speaker and organizer of IEEE workshops, international test forums and presently holds 12 international patents. Dr Sia has published more than 50 scientific journals and conference publications. His technical papers on RF, 5G production wafer tests and Silicon Photonics tests received multiple "Best Paper" awards at international wafer test conferences.
Bastian Tröger
Team leader of Product Management and Field Application, FRT Metrology / FormFactor, Inc.
As a graduate engineer specializing in physical optics, Bastian Troeger can look back on many years of professional experience in the area of optical metrology. His career at FRT started in 2007 in the development department, followed by the establishment of a new product management department and eventually led him to the management level of FormFactor FRT Metrology.
Amy Leong
SVP, Chief Commercial Officer, FormFactor, Inc.
Amy Leong has served as Senior VP, Chief Commercial Officer since January 2023, responsible for global customer sales and services, corporate marketing and M&A. From 2012 to 2022, she has held various management positions with FormFactor including Chief Marketing Officer and General Manager. Prior to FormFactor, Amy was VP of Marketing at MicroProbe from 2010 through the October 2012 closing of FormFactor’s acquisition of MicroProbe. Before joining MicroProbe, Amy worked at Gartner, Inc. as a Research Director from 2008 to 2010 and covered the foundry & logic market and various emerging applications. From 2003 to 2008, Amy worked at FormFactor where she served as Senior Director of Corporate Strategic Marketing and Director of DRAM Product Marketing. Prior to FormFactor, she worked in a variety of semiconductor process engineering, metrology, and product marketing roles at KLA and IBM. Amy currently serves as an independent board of director at Skywater Technology (NASDAQ: SKYT), the only US-investor owned pure-play semiconductor and technology foundry.
Amy holds an M.S. in Material Science and Engineering from Stanford University and a B.S. in Chemical Engineering from the University of California, Berkeley.
Bastian Tröger
Team leader of Product Management and Field Application, FRT Metrology / FormFactor, Inc.
As a graduate engineer specializing in physical optics, Bastian Troeger can look back on many years of professional experience in the area of optical metrology. His career at FRT started in 2007 in the development department, followed by the establishment of a new product management department and eventually led him to the management level of FormFactor FRT Metrology.
David Cooke
Sr. Product Marketing Manager, FormFactor, Inc.
David Cooke has a distinguished career in the semiconductor test and measurement community and with FormFactor. He has held positions in business development, account management and product marketing.
He has a masters of engineering from University of Massachusetts Lowell.
Simon Reissmann
Sr. Principal Applications Engineer, FormFactor, Inc.
Simon Reissmann holds a Bachelor and Masters degree in electrical engineering. He has industry experience in optical transceiver test and UV LED system from his previous employers Tektronix and Phoseon Technology. He currently supports silicon photonics customer outreach, testing and development for the FormFactor system business unit as Principal Applications Engineer in the Center of Expertise (COE).
Pratik Ghate
Principal RF Engineer, FormFactor, Inc.
Pratik Ghate received the B.E. (2014) in electronics engineering from Nagpur University, India, M.S. (2015) in electrical engineering from The University of Texas at El Paso, and Ph.D. (2021) in electrical engineering from The University of Texas at Arlington. His research interests include high frequency electromagnetics, RF design and measurements, antenna design and computational electromagnetics. Dr. Ghate joined FormFactor, Inc. in June 2021 where he is working as a Principal RF Engineer.
Hadi Najar
Sr Principal Engineer Mechanical Design, FormFactor, Inc.
Hadi Najar is currently Sr. Principal Engineer Mechanical Designer at FormFactor, Inc., Livermore, CA. He received his B.A.Sc. and M.A.Sc. degrees in electrical and computer engineering from the University of British Columbia, Vancouver, BC, Canada, in 2008 and 2010, respectively. He received his Ph.D. degree in electrical and mechanical engineering from the University of California at Davis (UC Davis), in 2014. His Ph.D. work and Post Doctoral Research focused on design and analysis of diamond-based MEMS resonators and hemispherical resonating gyroscopes. He was a Design Engineer with Texas Instruments, Inc., Santa Clara, CA in 2015. Dr. Najar has been the Chair of IEEE MEMS San Francisco-Bay Area chapter since 2016.
Jack De Grave
Director of Business Development, HPD / FormFactor, Inc.
Jack DeGrave joined the FormFactor-HPD Business Development team in early 2021 where he has focused on engaging with the Quantum Development Community members to map out the needs for cryogenic test and measurement, high density I/O device interfacing, and cryostats for deployment of quantum processors. His background in cryogenic test and measurement dates to early 2010 during his PhD studies in low temperature transport properties of helimagnets and skyrmions at the University of Wisconsin-Madison. After graduating, he held business development positions at several cryogenics companies. Jack brings greater than a decade of experience in cryogenic system design and test & measurement.
Dr. Deepak Kulkarni
FELLOW, ADVANCED PACKAGING, AMD
Keynote Presentation - Advanced Packaging: Enabling Moore’s Law’s Next Frontier
Chiplet architectures are fundamental to the continued economic viable growth of power efficient computing. Thus, the criticality of advanced packaging technologies and architectures correlated to Moore’s Law’s next frontier is high. New heterogeneous architectures, along with AMD’s industry leading advanced packaging roadmap, enable power, performance, area, and cost (PPAC). PPAC considerations per product influence the choice of Substrate (2D), Fanout based (2.5D) and Hybrid Bonded (3D) technologies and will be addressed in this keynote. Finally, AMD’s High Performance Fanout previewed in the RDNA3 architecture along with enabling technologies like power delivery and thermal improvements will be detailed.
Deepak Kulkarni is a Fellow, Advanced Packaging at AMD. Deepak has over 15 years of experience in packaging technology development. Over the years, he has held several leadership positions driving substrate technology development and yield improvement. Prior to joining AMD, Deepak was Senior Director of packaging yield at Intel Corporation. He holds eight patents and nineteen publications on various aspects of packaging such as 2.5D/3D architectures, DFM/DFY and AI techniques applied to yield management. His contributions to the semiconductor industry have been recognized by an Intel Achievement Award, Next 5% award (AMD) and best paper award (ITHERM). Deepak holds a PhD from the University of Illinois Urbana-Champaign with a major in mechanical engineering and a minor in computational science.
Pranav Shrivastava,
Principal Applications Engineer, FormFactor, Inc.
Pranav Kumar Shrivastava joined FormFactor GmbH Germany this year as a team member of CoE team at FFI. He done his B.Tech degree in Electronics and Communication Engineering from INDIA. Also completed M. Tech degree with the specialization in RF and Microwave Engineering from Indian Institute of Technology, Kharagpur, INDIA in 2014 and Ph.D. from Centre for Applied Research in Electronics, IIT Delhi, INDIA in 2022. His main research interests during his Ph.D. work involved RF micromachined components in mmWave range, phases shifters, RF MEMS switch, Sub-THz range metastructure and their characterization.
COMPASS Virtual 2023
Participate in our virtual COMPASS event from the comfort of your own location.
14 November
16 November
21 November
COMPASS 2023 Watch Parties
Are you local to Munich, Singapore or San Jose, California, attend our "watch party" in person....
14 November
16 November
21 November
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